EN

AWR5005DNR-Q1

Low Noise Amplifier for GNSS

Product details

Parameters

Frequency (GHz) GNSS L1&L2&L5
VCC (Min) (V) 1.5
VCC (Max) (V) 3.6
Gain(dB) 18.2
NF(dB) 0.7
Icc (mA) 7
Temperature -40℃~105℃
P1dB (dBm) -11
Package (mm) DFN 1.5X1.0-6L

Package | Pins | Size

DFN 1.5X1.0-6L

Features

1.AEC-Q100 in Progress 2.Operation frequencies: L1 Band: 1550MHz to 1615MHz,L2&L5 Band: 1164MHz to 1300MHz 3.High power gain:18.8dB@ L1 Band,19.5dB@ L2 Band,19.7dB@ L5 Band 4.Low noise figure:0.69dB@ L1 Band,0.68dB@ L2 Band,0.7dB@ L5 Band 5.Requires only one input matching inductor for L1 band while additional output matching capacitor and inductor are needed for L2/L5 band 6.Supply voltage: 1.5V to 3.6V 7.DFN 1.5X1.0-6L package 8.Broadband design ensures the functionality of all GNSS signals within 1164 to 1615 MHz with the same matching

Description

The AWR5005DNR-Q1 is a Low Noise Amplifier designed for Global Navigation Satellite Systems (GNSS) as GPS, GLONASS, Galileo and Compass. With on-chip DC blocking capacitors at RFIN and RFOUT, The AWR5005DNR-Q1 can be close to the antenna, requires only one input matching inductor for L1 band while additional output matching capacitor and inductor are needed for L2/L5 band, and reduces assembly complexity and the PCB area, enabling a cost-effective solution. The AWR5005DNR-Q1 with patented Smart Linearity Technology (SLT) achieves ultra-low noise figure, high linearity, high gain, over a wide range of supply voltages from 1.5V up to 3.6V. All these features make AWR5005DNR-Q1 an excellent choice for GNSS LNA as it improves sensitivity with low noise figure and high gain, provides better immunity against out-of-band jammer signals with high linearity, reduces filtering requirement of preceding stage and hence reduces the overall cost of the GNSS receiver. The AWR5005DNR-Q1 is available in a small lead-free, RoHS-Compliant, DFN 1.5X1.0-6L package

Technical documentation

Type
Title
Language
Date
Datasheet DS_AWR5005-Q1_EN_V1.0 英文   2025-12-18
Product Design Guide AWR5005DNR-Q1 Hardware Design Guide 英文   2026-07-14