EN

AW39114TSR

4-bit Bidirectional Voltage-Level Translator for Open-Drain and Push-Pull Applications

Product details

Parameters

Data Rate (Max) (Mbps) 24
VCCA (Min) (V) 1.1
VCCA (Max) (V) 3.6
VCCB (Min) (V) 1.65
VCCB (Max) (V) 5.5
ICCA+ICCB (Max) (μA) 18
Channel 4
Support Open Drain Push-Pull
Temperature -40℃~85℃
Transmission Direction Auto
Package (mm) TSSOP-14L

Package | Pins | Size

TSSOP-14L

Features

 自适应方向电平转换  最大传输速率 - 24Mbps (推挽结构) - 2Mbps (开漏结构)  供电电压范围: - A端口和VCCA: 1.1V ~ 3.6V - B端口和VCCB: 1.65V ~ 5.5V - VCCA ≤ VCCB  A/B端口内置上拉电阻  无上电时序要求:无论VCCA还是VCCB都可以先上电  支持超低功耗模式(OE引脚为低电平)  在JESD 78标准下Latch -Up超过±200mA  TSSOP-14L封装

Description

AW39114 is a 4-bit high-performance voltage-level translator without direction control signal, which is a non-inverting converter and can be used to convert digital signal with mixed-voltage systems. It needs two separate power supply rails, with the A ports tracks the VCCA ranging from 1.1V to 3.6 V, and the B ports tracks the VCCB ranging from 1.65 V to 5.5 V. This makes the chip has capabilities of support both lower and higher logic signal levels translation between any of the 1.2V, 1.8 V, 2.5 V, 3.3 V, and 5 V voltage nodes.
The OE input circuit is supplied by VCCA. Meanwhile, OE is recommended to be tied to GND through an external pull-down resistor to ensure all I/O to be pulled to the supply voltage. No power supply sequencing requirements means either VCCA in VCCB can be powered up first, and OE should be enabled after both VCCA and VCCB are established.

Technical documentation

Type
Title
Language
Date
Datasheet DS_AW39114TSR_EN_V1.0 英文   2023-06-06
Product Design Guide AW39114_Hardware_Design_Guide 英文   2025-07-21

Design & development

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