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AW39104FOR

4-bit Bidirectional Voltage-Level Translator for Open-Drain and Push-Pull Applications

Datasheet :

Product details

Parameters

Data Rate (Max) (Mbps)	24
VCCA (Min) (V)	1.65
VCCA (Max) (V)	3.6
VCCB (Min) (V)	2.3
VCCB (Max) (V)	5.5
ICCA+ICCB (Max) (μA)	18
Channel	4
Support	Open Drain Push-Pull
Temperature	-40℃~85℃
Transmission Direction	Auto
Package (mm)	FOWLP 1.87X1.37-12B

Package | Pins | Size

FOWLP 1.87X1.37-12B(0.587)

Features

⚫ Voltage Level Translator Without DirectionControl Signal ⚫ Maximum Data Rates - 24Mbps (Push Pull) - 2Mbps (Open Drain) ⚫ Power Supply Range: - A Port and VCCA: 1.65 V to 3.6 V - B Port and VCCB: 2.3 V to 5.5 V - VCCA ≤ VCCB ⚫ Pull Up Resistors are Integrated in A Port and B Port ⚫ No Power-Supply Sequencing Required: Either VCCA or VCCB Can be Ramped First ⚫ Support Ultra-Low Power Consumption Mode with OE Pin is Low Voltage Level ⚫ I/O Pin ESD: - A Port: 2.5 kV (HBM) - B Port: 6 kV (HBM) ⚫ Latch -Up Performance Exceeds ±200mA Under JESD 78 Standard ⚫ FOR 1.87mm×1.37mm-12B Package

Description

AW39104 is a 4-bit high-performance voltage-level translator without direction control signal, which is a non-inverting converter and can be used to convert digital signal with mixed-voltage systems. It needs two separate power supply rails, with the A ports tracks the VCCA ranging from 1.65 V to 3.6 V, and the B ports tracks the VCCB ranging from 2.3 V to 5.5V. This makes the chip has capabilities of support both lower and higher logic signal levels translation between any of the 1.8 V, 2.5 V, 3.3 V, and 5 V voltage nodes. If the voltage level of output-enable (OE) pin is low, the chip works in the high-impedance state, which costs ultra-low power-supply quiescent current. And the OE input circuit is supplied by VCCA. Meanwhile, OE is recommended to be tied to GND through a pull-down resistor to ensure the highimpedance state during power up or power down. When A/B ports operating in high-impedance state, the A/B Ports should be pull-down/high through resisters to ensure the A/B Ports having fixed state. No power supply sequencing requirements means either VCCA or VCCB can be powered up first, and OE should be enabled after both VCCA and VCCB are established.

Technical documentation

	Type	Title		Language		Date
	Datasheet	DS_AW39104FOR_EN_V1.5_AW39104 4-Bit Bidirectional Voltage-Level_Translator for Open-Drain and Push-Pull Applications		英文		2024-09-23

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Hardware development

Evaluation board

AW391X4 EVB V1.0 — AW39204PLR_EVB_1.0 is an evaluation board specifically designed for 4-channel voltage level translator IC.

AW39204PLR_EVB_1.0 is an evaluation board specifically designed for 4-channel voltage level translator IC.

View options

Hardware development

Evaluation board

AW391X4 EVB V1.0 — AW39204PLR_EVB_1.0 is an evaluation board specifically designed for 4-channel voltage level translator IC.

AW39204PLR_EVB_1.0 is an evaluation board specifically designed for 4-channel voltage level translator IC.

View options