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AW12122HLGR

100-8500MHz DPDT Antenna cross Switch

Datasheet :
Preview - AW12122HLGR - Datasheet
Ref.Price
  • 1-99￥2.43
  • 100-249￥2.00
  • 250-499￥1.61
  • 500-999￥1.27
  • 1000+￥0.97

Product details

Frequency (GHz) 0.1~8.5
Switch Feature DPDT+Antenna switch
Control Interface GPIO
VDD (Min) (V) -0.3
VDD (Max) (V) 3.6
VIO (Min) (V) /
VIO (Max) (V) /
P0.1dB (dBm) 39
IL (Min) (dB) 0.35
IL (Max) (dB) 1.1
ISO (Max) (dB) 53
ISO (Min) (dB) 35
Temperature -40℃~105℃
Package (mm) LGA 1.55X1.15-10L
LGA 1.55X1.15-10L
1、Broadband frequency range: 100 to 8500MHz 2、Low insertion loss: 0.72dB typical @ 5925MHz 3、High isolation: 44dB typical @ 5925MHz 4、GPIO interface 5、LGA 1.55X1.15-10L package 6、No DC blocking capacitors required (unless external DC is applied to the RF ports)
The AW12122HLGR is a Silicon-On-Insulator(SOI) DPDT switch with low insertion loss and high Isolation. It can be used to support band switching and mode switching for cellular 4G/5G, data cards and tablets.

Technical documentation
Type
Title
Date
Product Design Guide AW12122HLGR Hardware Design Guide   2024-08-22
Datasheet DS_AW12122H_EN_V1.2   2026-01-13

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Hardware development

Evaluation board

AW12X22_EVB_V1.3 — This EVB is used to evaluate the performance of DPDT, including S-parameters, harmonics, P0.1dB, and other metrics.

Performance Evaluation for DPDT Switches with GPIO Interface

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Hardware development

Evaluation board

AW12X22_EVB_V1.3 — This EVB is used to evaluate the performance of DPDT, including S-parameters, harmonics, P0.1dB, and other metrics.

Performance Evaluation for DPDT Switches with GPIO Interface

View options