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AWP37035DADJADNR

600mA High Performance Low-Dropout Linear Regulator

Datasheet :
Preview - AWP37035DADJADNR - Datasheet

Product details

Parameters

Load Current (Max) (mA) 600
Power Supply (Min) (V) 1.4
Power Supply (Max) (V) 5.5
Vout (Min) (V) 0.8
Vout (Max) (V) 5.0
Iq (Typ) (μA) 35
Vdropout (mV) 230@IOUT=300mA,VOUT=2.8V
PSRR @1KHz(dB) 72@IOUT=30mA
Output Noise (μVrms) 57@IOUT=30mA,VOUT=2.8V
Discharge YES
Output options ADJ
Temperature -40℃~105℃
IO Level (V) 1.2
Package (mm) DFN 2X2-6L

Package | Pins | Size

DFN 2X2-6L

Features

 Input voltage range: 1.4V to 5.5V  Fixed outputs of 0.8V~4.3V  Adjustable outputs of 0.8V~5V  Rated output current: 600mA  Quiescent current: typical 35µA  Typical 0.1µA shutdown current  Typical 230mV dropout voltage(IOUT=300mA, 2.8V output)  Power supply rejection ratio(IOUT=30mA, 2.8V output)  72dB@ freq=1kHz  60dB@ freq=100kHz  42dB@ freq=1MHz  Noise: typical 57µVrms (IOUT=30mA, BW=10Hz to 100kHz, 2.8V output)  Built-in output short protection: typical 300mA when output short to ground  SOT23-5L package and DFN2mm✖2mm-6L

Description

AWP37035DXXX is a low dropout voltage regulator featuring low ON resistance, high PSRR, low Noise, good load/line transient response and smooth soft-start. AWP37035DXXX integrates current limit, short circuit protection, thermal shutdown, sufficiently protecting IC from being damaged. AWP37035DXXX is designed to work with a 1µF or more input ceramic capacitor and a 1µF or more output ceramic capacitor. The low power dissipation and good dynamic response make AWP37035DXXX very suitable for hand-held communication equipment. Tiny package makes high density mounting of the IC on boards possible.

Technical documentation
Type
Title
Language
Date
Datasheet DS_AWP37035DXXX_EN_V1.1 英文   2026-07-24

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Hardware development

Evaluation board

AWP37035DXXXADNR_EVB_V1.0 — The AWP37035DXXXADNR Evaluation Board serves as a test platform for AWINIC’s high-PSRR low-dropout LDO. Every key test point of the chip is separately accessible on the EVB.

EVB Evaluation Board for High PSRR LDO AWP37035DXXXADNR

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Hardware development

Evaluation board

AWP37035DXXXADNR_EVB_V1.0 — The AWP37035DXXXADNR Evaluation Board serves as a test platform for AWINIC’s high-PSRR low-dropout LDO. Every key test point of the chip is separately accessible on the EVB.

EVB Evaluation Board for High PSRR LDO AWP37035DXXXADNR

View options