AW86008QNR

产品详细信息

参数

Actuator Type SOC-OIS
Output I(mA) ±160mA
VDD (Max) (V) 3.6
VDD (Min) (V) 2.6
I2C (Hz) 100K 400K 1M
I2C Addr Configurable
IQ (mA) 5
ISD (μA) 15
Temperature -40℃~85℃
Control Mode /
ADC (bit) 16
Package (mm) QFN 6X6-48L

封装 | 引脚 | 尺寸

QFN 6X6-48L

特性

4-ch closed-loop control ARM 32-bit STARCU with FPU and DSP,frequency up to 96MHz 128KB Flash, SRAM: 64KB for program and 16KB for data, 8KB ROM Analog: VAVDD = 2.6V to 3.6V, Driver: VVM = 1.8V to 3.6V, I/O: VIOVDD = 1.1V to 3.6V Current type linear driver (4-ch,12-bit), default Imax. = ±160mA, Imax can support ±215mA PGA (8-ch), support 4-ch differential signal input or 8-ch single-ended signal input Each PGA offset(8-ch,10bit DAC) independently adjustable PWM driver, support 4-ch current or 4-pairs voltage modulated output Sigma-delta ADC(13-ch), configurable 12/14/16bit resolution. DAC(4-ch,8bit), Hall bias current: 0 to 4mA, DAC(4-ch,8bit),TMR bias voltage: 1.2 to 2.5V SPI (2-ch), configurable master / slave / monitor mode, configurable 3/4 wire bus I2C(2-ch), configurable master / slave mode Support I3C slave and UART Support Hardware Cordic and Digital Filter

技术文档

类型
项目标题
语言
日期
产品用户指南 AW86008QNR_EVB_User's_Guide 英文   2025-09-30
产品用户指南 AW86008QNR_EVB_User's_Guide 中文   2025-09-30
产品手册 DS_AW86008QNR_EN_V1.1 英文   2026-06-16
产品设计指南 AW86008QNR Software Design Guide 英文   2026-06-25
产品设计指南 AW86008QNR Software Design Guide 中文   2026-06-25
产品设计指南 DG_AW86008QNR_Hardware_Design_Guide_CN_V1.2 中文   2026-06-30
产品设计指南 DG_AW86008QNR_Hardware_Design_Guide_EN_V1.2 英文   2026-06-30
产品应用手册 AN_AW86008QNR_Application_Note 英文   2026-07-10
可靠性报告 Reliability Qualification Report For AW86008QNR 英文   2026-05-19
技术帖 【技术帖】揭秘“卷帘门效应”:从单反到手机的成像困境与破局之道 中文   2026-01-26