| Core | M0 |
| fₘₐₓ(MHz) | 96 |
| Flash(KB) | 128 |
| RAM(KB) | 16 |
| Dataflash(KB) | - |
| I/O | 57 |
| DIV | Y |
| DMA | Y |
| CRC | - |
| Adv Timer | 1 |
| GP Timer | 2 |
| Ba Timer | 3 |
| LP Timer | 1 |
| WDG | 1*IWDG, 1*WWDG |
| RTC | Y |
| U(S)ART | 4 |
| LP UART | 1 |
| I2C | 1 |
| I3C(Slave/Master) | 1(S) |
| SPI | 2 |
| I2S | 2 |
| USB2.0 | 1(FS) |
| CAN2.0B | 1(FD) |
| LIN | - |
| ADC(ch、bit、Msps) | 1*(14、12、1) |
| DAC | - |
| COMP | 2 |
| OPA | - |
| PGA | - |
| VS | - |
| IEXC | - |
| CAP | - |
| Segment LCD | - |
| LED/RGB | - |
| Package | QFN 5X5-32L |
| Package Size | 5x5 10x10 |
| VDD(V) | 2.0~5.5 |
| Temp(℃) | -40~85 |
| Special Features | Backup reg, PLL1/PLL2 |
| QFN 5X5-32L |
|
タイプ
|
タイトル
|
言語
|
日付 | |||
|---|---|---|---|---|---|---|
| Product Design Guide | AW32F015 Hardware Design Guide | 中文 | 2025-07-24 | |||
| Product Design Guide | AW32F015 Software Design Guide | 中文 | 2025-09-29 | |||
| Product Design Guide | AW32F015 Software Design Guide | 英文 | 2026-07-08 | |||
| Datasheet | DS_AW32F015_CN_V1.3 | 中文 | 2026-10-17 | |||
| Datasheet | DS_AW32F015_EN_V1.3 | 英文 | 2026-10-17 |
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