AWA89601QNR

产品手册：

产品详细信息

参数

IO Supply (Max) (V)	3.63
IO Supply (Min) (V)	2.97
AVDD (Max) (V)	3.63
AVDD (Min) (V)	2.97
Number of ADC channels	2
Number of DAC channels	1
Analog inputs	2
Digital inputs	2
Analog onputs	1
ADC Signal to noise ratio(dB)	95
ADC THD+N Ratio(dB)	-80
DAC Signal to noise ratio(dB)	95
DAC THD+N Ratio(dB)	-75
DSP	YES
NPU	YES
Digital Audio Interface	IIS, PDM,UART
Control Interface	IIC
Temperature	-40℃~85℃

封装 | 引脚 | 尺寸

QFN 5X5-40L

特性

 AWINIC Audio Neural Processing Unit(A-NPU^TM): A-NPU^TM supports neural networks such as DNN, TDNN, RNN, and CNN, as well as parallel vector operations. It can realize functions including deep learning noise reduction, sound source localization, and echo cancellation  CPU and memory: The CPU clock speed can reach 240 MHz; Built-in 4MBytes Flash memory; Built-in 640KBytes SRAM; Built-in 512-bit eFuse, can be used for application encryption;  Audio Codec: High-performance, low-power audio ADC, SNR ≥ 95dB; Low-power audio DAC, SNR ≥ 95dB;  Audio Interface: 1-way IIS interface, supports configurable master-slave; 1-channel dual-path PDM interface;  ADC and PWM: Built-in 4-channel 12-bit SAR ADC; Supports 6 PWM interfaces;  GPIO: 26 high-speed GPIOs with a response rate of up to 20MHz; Among them, 18 GPIOs support 5V input;  Reset and power management: Built-in Power Management Unit (PMU); PMU input voltage range: 3.6V to 5.5V; Built-in Power-On Reset (POR); Built-in Voltage Detection (PVD);  Clock: Built-in RC oscillator, also supports external crystal oscillator; developers can choose to use either the built-in RC or an external crystal as the chip clock source depending on different application scenarios;  Communication interface: 1-channel IIC interface; 3 UART interfaces, supporting 5V and up to 3Mbps speed;  Timers and Watchdogs: Built-in 4 sets of 32-bit timers and 2 sets of watchdogs;

技术文档

类型	项目标题	语言	日期
产品设计指南	AWA89601QNR 硬件设计指南	中文	2026-01-22
产品手册	DS_AWA89601_EN_V1.1	英文	2026-04-24
新品发布	【新品发布】艾为重磅发布端侧AI高性能NPU语音芯片，打造智能语音体验新标杆	中文	2026-01-07