A：在芯片正常的情况，可以按照如下步骤进行排查
步骤一、按键失效时需先确认I2C通信：
（1） VCC供电是否在2.5V~5.5V之内；
（2） RSTN或SHDN使能引脚是否拉高；
（3） I2C地址有AD0和AD1的链接方式决定，通信过程中是否正确；
（4） 通过读0x10寄存器的CHIPID 0x23来判断I2C通信是否成功。
步骤二、确认硬件设计：端口做gpio input时，PX_X或OUTx端口和INTN都必须要有kΩ级别的外部上拉
步骤三、接着确认寄存器配置
（1） 端口的模式配置：
AW9523B和AW9527的0x12和0x13寄存器如下：
Table 1. LED mode switch register（12H）
|
Address
|
Name
|
Description
|
Default
|
|
12H
|
LED Mode Switch
|
Configure P0_7~P0_0 as LED or GPIO mode。
1：GPIO mode
0：LED mode
|
FFH
|
Table 2. LED mode switch register（13H）
|
Address
|
Name
|
Description
|
Default
|
|
13H
|
LED Mode Switch
|
Configure P1_7~P1_0 as LED or GPIO mode。
1：GPIO mode
0：LED mode
|
FFH
|
AW9110C和AW9106C的0x12和0x13寄存器如下：
Table 3. P0WKMD(12H), GPIO control switch to LED driver register
|
Bit
|
Symbol
|
Description
|
Default
|
|
D[7:6]
|
-
|
-
|
Remain
|
|
D5
|
P0WKMD[5]
|
OUT9 mode control
0：LED mode
1：GPIO mode
|
1
|
|
D4
|
P0WKMD[4]
|
OUT8 mode control
0：LED mode
1：GPIO mode
|
1
|
|
D3
|
P0WKMD[3]
|
OUT7 mode control
0：LED mode
1：GPIO mode
|
1
|
|
D2
|
P0WKMD[2]
|
OUT6 mode control
0：LED mode
1：GPIO mode
|
1
|
|
D1
|
P0WKMD[1]
|
OUT5 mode control
0：LED mode
1：GPIO mode
|
1
|
|
D0
|
P0WKMD[0]
|
OUT4 mode control
0：LED mode
1：GPIO mode
|
1
|
Table 4. P1WKMD(13H), GPIO control switch to LED driver register
|
Bit
|
Symbol
|
Description
|
Default
|
|
D[7:4]
|
-
|
-
|
Remain
|
|
D3
|
P1WKMD[3]
|
OUT3 mode control
0：LED mode
1：GPIO mode
|
1
|
|
D2
|
P1WKMD[2]
|
OUT2 mode control
0：LED mode
1：GPIO mode
|
1
|
|
D1
|
P1WKMD[1]
|
OUT1 mode control
0：LED mode
1：GPIO mode
|
1
|
|
D0
|
P1WKMD[0]
|
OUT0 mode control
0：LED mode
1：GPIO mode
|
1
|
（2） 方向配置是否正确：
AW9523B和AW9527的0x04和0x05寄存器如下：
Table 5. Configuration register（04H，05H）
|
Address
|
Name
|
Description
|
Default
|
|
04H
|
Config_Port0
|
P0 port input/output mode select. 0-output; 1-input
|
00H
|
|
05H
|
Config_Port1
|
P1 port input/output mode select. 0-output; 1-input
|
00H
|
AW9110C和AW9106C的0x04和0x05寄存器如下：
Table 6. P0DIR(04H),GPIO input or output select register or as BLINK,SMART-FADE Mode select
|
Bit
|
Symbol
|
Description
|
Default
|
|
D[7:6]
|
-
|
-
|
Remain
|
|
D5
|
P0DIR[5]
|
OUT9 input or output choice
0：output
1：input
|
0
|
|
D4
|
P0DIR[4]
|
OUT8 input or output choice
0：output
1：input
|
0
|
|
D3
|
P0DIR[3]
|
OUT7 input or output choice
0：output
1：input
|
0
|
|
D2
|
P0DIR[2]
|
OUT6 input or output choice
0：output
1：input
|
0
|
|
D1
|
P0DIR[1]
|
P0WKMD[1]=1, OUT5 input or output choice
0：output
1：input
|
0
|
|
D0
|
P0DIR[0]
|
P0WKMD[0] =1, OUT4 input or output choice
0：output
1：input
|
0
|
Table 7. P1DIR(05H),GPIO input or output selection register, or used for BLINK,SMART-FADE mode choice
|
Bit
|
Symbol
|
Description
|
Default
|
|
D[7:4]
|
-
|
-
|
Remain
|
|
D3
|
P1DIR[3]
|
P0WKMD[3] =1 , OUT3 input or output choice
0：output
1：input
|
0
|
|
D2
|
P1DIR[2]
|
P0WKMD[2] =1 , OUT2 input or output choice
0：output
1：input
|
0
|
|
D1
|
P1DIR[1]
|
P0WKMD[1] =1 , OUT1 input or output choice
0：output
1：input
|
0
|
|
D0
|
P1DIR[0]
|
P0WKMD[0] =1 , OUT0 input or output choice
0：output
1：input
|
0
|
（3） 中断是否使能：
AW9523B和AW9527的0x06和0x07寄存器如下：
Table 8. Interrupt enable register（06H，07H）
|
Address
|
Name
|
Description
|
Default
|
|
06H
|
Int_Port0
|
P0 port interrupt enable. 0-enable; 1-disable
|
00H
|
|
07H
|
Int_Port1
|
P1 port interrupt enable. 0-enable; 1-disable
|
00H
|
AW9110C和AW9106C的0x06和0x07寄存器如下：
Table 9. P0MSK(06H),GPIO Mask Interrupt Register
|
Bit
|
Symbol
|
Description
|
Default
|
|
D[7:2]
|
-
|
-
|
Remain
|
|
D5
|
P0MSK[5]
|
OUT9 enable interrupt
0：enable
1：disable
|
0
|
|
D4
|
P0MSK[4]
|
OUT8 enable interrupt
0：enable
1：disable
|
0
|
|
D3
|
P0MSK[3]
|
OUT7 enable interrupt
0：enable
1：disable
|
0
|
|
D2
|
P0MSK[2]
|
OUT6 enable interrupt
0：enable
1：disable
|
0
|
|
D1
|
P0MSK[1]
|
OUT5 enable interrupt
0：enable
1：disable
|
0
|
|
D0
|
P0MSK[0]
|
OUT4 enable interrupt
0：enable
1：disable
|
0
|
Table 10. P1MSK (07H),GPIO Mask Interrupt Register
|
Bit
|
Symbol
|
Description
|
Default
|
|
D[7:4]
|
-
|
-
|
Remain
|
|
D3
|
P1MSK[3]
|
OUT3 enable interrupt
0：enable
1：disable
|
0
|
|
D2
|
P1MSK[2]
|
OUT2 enable interrupt
0：enable
1：disable
|
0
|
|
D1
|
P1MSK[1]
|
OUT1 enable interrupt
0：enable
1：disable
|
0
|
|
D0
|
P1MSK[0]
|
OUT0 enable interrupt
0：enable
1：disable
|
0
|
步骤四、PX_X或OUTx端口配置成gpio input时，由于外部有上拉电阻，所以默认为高电平；按下按键后变为低电平，其低电平保持超过8us时，INTN会被拉低；
平台连接INTN引脚的GPIO需配置成下降沿触发；那INTN从高电平变为低电平会触发中断并执行中断函数，在中断函数中读0x00和0x01寄存器确认是哪个引脚被按下
AW9523B和AW9527的0x00和0x01寄存器如下：
Table 11. Input state register（00H，01H）
|
Address
|
Name
|
Description
|
Default
|
|
00H
|
Input_Port0
|
P0 port current logic state, 0-low level；1-high level
|
X
|
|
01H
|
Input_Port1
|
P1 port current logic state, 0-low level；1-high level
|
X
|
AW9110C和AW9106C的0x00和0x01寄存器如下：
Table 12. P0DI(00H),GPIO input state register
|
Bit
|
Symbol
|
Description
|
Default
|
|
D[7:6]
|
-
|
-
|
Remain
|
|
D5
|
P0DI[5]
|
OUT9 pin state
0：Low level
1：High level
|
X
|
|
D4
|
P0DI[4]
|
OUT8 pin state
0：Low level
1：High level
|
X
|
|
D3
|
P0DI[3]
|
OUT7 pin state
0：Low level
1：High level
|
X
|
|
D2
|
P0DI[2]
|
OUT6 pin state
0：Low level
1：High level
|
X
|
|
D1
|
P0DI[1]
|
OUT5 pin state
0：Low level
1：High level
|
X
|
|
D0
|
P0DI[0]
|
OUT4 pin state
0：Low level
1：High level
|
X
|
Table 13. P1DI(01H),GPIO input state register
|
Bit
|
Symbol
|
Description
|
Default
|
|
D[7:4]
|
-
|
-
|
Remain
|
|
D3
|
P1DI[3]
|
OUT3 pin state
0：Low level
1：High level
|
X
|
|
D2
|
P1DI[2]
|
OUT2 pin state
0：Low level
1：High level
|
X
|
|
D1
|
P1DI[1]
|
OUT1 pin state
0：Low level
1：High level
|
X
|
|
D0
|
P1DI[0]
|
OUT0 pin state
0：Low level
1：High level
|
X
|
步骤五、用示波器测试PX_X或OUTx端口和INTN的信号，看其电平变化是否符合第四步描述
