| BW(GHz) | 0.16 |
| Channel | 4 |
| DC_LS(V) | 28 |
| DC_HS(V) | / |
| Surge_LS（Max）(V) | 40 |
| Surge_LS（Min）((V) | -40 |
| Temperature | -40℃~85℃ |
| IO Level (V) | / |
| Package (mm) | QFN 3X3-20L |
| QFN 3X3-20L |
|
タイプ
|
タイトル
|
言語
|
日付 | |||
|---|---|---|---|---|---|---|
| Product Design Guide | AW3562X 硬件设计指南 | 中文 | 2023-03-31 | |||
| Datasheet | DS_AW35622_EN_V1.2 | 英文 | 2025-04-28 |
評価ボード
AW35622QNR_EVB_V1.0 — AW5622QNR EVB V1.0 is a single-chip Type-C port protection ， AW35622 EVB board， The key test points of the chip are drawn separately on the EVB board, which is convenient for testing.
AW5622QNR EVB V1.0 is a single-chip Type-C port protection ， AW35622 EVB board， The key test points of the chip are drawn separately on the EVB board, which is convenient for testing.
評価ボード
AW35622QNR_EVB_V1.0 — AW5622QNR EVB V1.0 is a single-chip Type-C port protection ， AW35622 EVB board， The key test points of the chip are drawn separately on the EVB board, which is convenient for testing.
AW5622QNR EVB V1.0 is a single-chip Type-C port protection ， AW35622 EVB board， The key test points of the chip are drawn separately on the EVB board, which is convenient for testing.
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